EDN

Synthesis tool links MATLAB with ASIC, FPGA designs

MILPITAS, Calif. — AccelChip has crafted a DSP synthesis tool that converts algorithms developed in MATLAB into synthesizable RTL that can be used during the design of FPGAs, ASICs and structured ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
New Electronics

Xilinx partners with NI and MathWorks to push fpga performance

Xilinx is working with National Instruments and MathWorks to offer a combination of software, model, platform and IP based design environments for its Zynq SoC fpga devices. These environments, it ...
Houston Chronicle

(BW) National Instruments Announces the 20th Anniversary Edition of LabVIEW; LabVIEW 8.20 Delivers General Compatibility with The MathWorks, Inc. MATLAB(R) Software, FPGA-Based ...

AUSTIN, Texas--(BUSINESS WIRE)--Aug. 8, 2006--National Instruments (Nasdaq:NATI), a global leader in virtual instrumentation, today announced NI LabVIEW 8.20 (www.ni ...
Design-Reuse

RF Engines'HyperSpeed Plus offers unprecedented FPGA performance with 52 Giga Samples per Second Pipeline FFT cores

Newport, Isle of Wight, UK – 7 September 2011 – RF Engines Limited (RFEL) has set what it believes to be an unprecedented performance benchmark for commercially available Pipeline Fast Fourier ...