Electronic Design

Pioneering FPGA-on-Modules: SGET Works to Develop Standard

Why board-level standardization of FPGA implementations matter. What the Harmonized FPGA Module (HFM) standard entails. How semiconductor manufacturers, embedded module manufacturers, VARs, system ...
EDN

FPGA, PCB tools must work together

As system design companies deal with the trials of today's economic environment, they face the dual challenges of finding ways to improve the efficiency of their product development and manufacturing ...
EDN

FPGA debugger works at full speed

MUNICH, Germany — EDA startup EDAptability has announced the availability of its FPGA and ASIC debugging tool TotalScope. With a combination of RTL level elaboration, model extraction and modification ...

How System On Module Technology Addresses Supply Chain Volatility

For products with moderate volumes, shorter life cycles or requirements to serve geographically diverse markets, SoMs offer ...
Business Wire

MathWorks Speeds Up FPGA-in-the-Loop Verification

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced new capabilities in HDL Verifier to speed up FPGA-in-the-loop (FIL) verification. The new FIL capabilities enable faster communication with ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.